CPU2006 Flag Description
Dell Inc. Dell Precision T3500 (Intel Xeon X5570, 2.93 GHz)


Base Compiler Invocation

C benchmarks

C++ benchmarks


Peak Compiler Invocation

C benchmarks

C++ benchmarks


Base Portability Flags

403.gcc

464.h264ref

483.xalancbmk


Peak Portability Flags

403.gcc

464.h264ref

483.xalancbmk


Base Optimization Flags

C benchmarks

C++ benchmarks


Peak Optimization Flags

C benchmarks

400.perlbench

401.bzip2

403.gcc

429.mcf

445.gobmk

456.hmmer

458.sjeng

462.libquantum

464.h264ref

C++ benchmarks

471.omnetpp

473.astar

483.xalancbmk


Base Other Flags

C benchmarks

403.gcc


Peak Other Flags

C benchmarks

403.gcc


Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.


System and Other Tuning Information

Platform settings

One or more of the following settings may have been set. Please see the Notes section of the report to determine which, if any, have been modified.

Adjacent Cache Line Prefetch:

This BIOS option allows the enabling/disabling of a processor mechanism to fetch the adjacent cache line within an 128-byte sector that contains the data needed due to a cache line miss.

In some limited cases, setting this option from the Default may improve performance. In the majority of cases, the default setting provides better performance. Users should modify this option after performing application benchmarking to verify improved performance in their environment.

Hardware Prefetch:

This BIOS option allows allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern recognition algorithm.

In some limited cases, setting this option to Disabled may improve performance. In the majority of cases, the option set to Enabled provides better performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Hyper-Threading Technology

This BIOS setting disables/enables Hyper-Threading (HT) Technology. HT enables the processor to allocate an additional thread to a core.

Memory Node Interleaving

This BIOS setting when set to NUMA (Non-Uniform Memory Access) configures the system memory into blocks local to each processor. A NUMA-aware operating system can use this configuration to intelligently allocate memory for optimal performance.


Flag description origin markings:

[user] Indicates that the flag description came from the user flags file.
[suite] Indicates that the flag description came from the suite-wide flags file.
[benchmark] Indicates that the flag description came from a per-benchmark flags file.

The flags file that was used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/dell.ic11.0.windows.flags.20090710.html.

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/dell.ic11.0.windows.flags.20090710.xml.


For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.1.
Report generated on Wed Jul 23 00:00:34 2014 by SPEC CPU2006 flags formatter v6906.