CPU2006 Flag Description
Hewlett-Packard Company ProLiant ML370 G5 (3.33 GHz, Intel Xeon X5470)

This result has been formatted using multiple flags files. The "default header section" from each of them appears next.

Default header section from Intel-ic11.0-int-linux64-revD

SPEC CPU2006 Flag Description for the Intel(R) C++ and Fortran Compiler 11.0 for IA32 and Intel 64 applications

Copyright © 2006 Intel Corporation. All Rights Reserved.

Default header section from HP-Intel-Linux-Settings-flags

SPEC CPU2006 Software OS and BIOS tuning Descriptions HP ProLiant Intel-based systems applications

Copyright © 2007 Intel Corporation. All Rights Reserved.

Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.

• • -O2
  • 

  • Enables optimizations for speed. This is the generally recommended optimization level. This option also enables:
    - Inlining of intrinsics
    - Intra-file interprocedural optimizations, which include:
    - inlining
    - constant propagation
    - forward substitution
    - routine attribute propagation
    - variable address-taken analysis
    - dead static function elimination
    - removal of unreferenced variables
    - The following capabilities for performance gain:
    - constant propagation
    - copy propagation
    - dead-code elimination
    - global register allocation
    - global instruction scheduling and control speculation
    - loop unrolling
    - optimized code selection
    - partial redundancy elimination
    - strength reduction/induction variable simplification
    - variable renaming
    - exception handling optimizations
    - tail recursions
    - peephole optimizations
    - structure assignment lowering and optimizations
    - dead store elimination
    

  • Includes:
    • -O1
      • -funroll-loops
      • -fno-builtin
      • -mno-ieee-fp
      • -fomit-framepointer
      • -ffunction-sections
      • -ftz
• • -O1
  • 

  • Enables optimizations for speed and disables some optimizations that increase code size and affect speed.
    To limit code size, this option:

    • Enables global optimization; this includes data-flow analysis, code motion, strength reduction and test replacement, split-lifetime analysis, and instruction scheduling.
    • Disables intrinsic recognition and intrinsics inlining.

    The O1 option may improve performance for applications with very large code size, many branches, and execution time not dominated by code within loops.

    -O1 sets the following options:
    -funroll-loops0, -fno-builtin, -mno-ieee-fp, -fomit-framepointer, -ffunction-sections, -ftz
  • Includes:
    • -funroll-loops
    • -fno-builtin
    • -mno-ieee-fp
    • -fomit-framepointer
    • -ffunction-sections
    • -ftz
• • -funroll-loops
  • 

  • Tells the compiler the maximum number of times to unroll loops. For example -funroll-loops0 would disable unrolling of loops.

• • -fno-builtin
  • 

  • -fno-builtin disables inline expansion for all intrinsic functions.

• • -mno-ieee-fp
  • 

  • This option trades off floating-point precision for speed by removing the restriction to conform to the IEEE standard.

• • -fomit-framepointer
  • 

  • EBP is used as a general-purpose register in optimizations.

• • -ffunction-sections
  • 

  • Places each function in its own COMDAT section.

• • -ftz
  • 

  • Flushes denormal results to zero.

System and Other Tuning Information

Platform settings

One or more of the following settings may have been set. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.

Power Regulator for ProLiant support (Default=HP Dynamic Power Savings Mode)

Values for this BIOS setting can be:

• HP Dynamic Power Savings Mode: Automatically varies processor speed and power usage based on processor utilization. Allows reducing overall power consumption with little or no impact to performance. Does not require OS support.
• HP Static Low Power Mode: Reduces processor speed and power usage. Guarantees a lower maximum power usage for the system. Performance impacts will be greater for environments with higher processor utilization.
• HP Static High Performance Mode: Processors will run in their maximum power/performance state at all times regardless of the OS power managment policy.
• OS Control Mode: Processors will run in their maximum power/ performance state at all times unless the OS enables' a power management policy.

Adjacent Sector Prefetch (Default = Enabled):

This BIOS option allows the enabling/disabling of a processor mechanism to fetch the adjacent cache line within an 128-byte sector that contains the data needed due to a cache line miss.

In some limited cases, setting this option to Disabled may improve performance. In the majority of cases, the default value of Enabled provides better performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Hardware Prefetch (Default = Enabled):

This BIOS option allows allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern recognition algorithm.

In some limited cases, setting this option to Disabled may improve performance. In the majority of cases, the default value of Enabled provides better performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Defer All Transactions Mode (Default = Disabled):

When this option is enabled, front-side bus bandwidth may be increased on systems with heavy I/O workload because CPU initiated I/O transactions can be deferred enabling other transactions to make progress while data is retrieved. However, latency for completing transactions may also increase. The system's workload will determine which setting will provide highest performance.

submit= MYMASK=`printf '0x%x' \$((1<<\$SPECCOPYNUM))`; /usr/bin/taskset \$MYMASK $command

When running multiple copies of benchmarks, the SPEC config file feature submit is sometimes used to cause individual jobs to be bound to specific processors. This specific submit command is used for Linux. The description of the elements of the command are:

• /usr/bin/taskset [options] [mask] [pid | command [arg] ... ]:
  taskset is used to set or retreive the CPU affinity of a running process given its PID or to launch a new COMMAND with a given CPU affinity. The CPU affinity is represented as a bitmask, with the lowest order bit corresponding to the first logical CPU and highest order bit corresponding to the last logical CPU. When the taskset returns, it is guaranteed that the given program has been scheduled to a legal CPU.
  
  The default behaviour of taskset is to run a new command with a given affinity mask:
  
  taskset [mask] [command] [arguments]
• $MYMASK: The bitmask (in hexadecimal) corresponding to a specific SPECCOPYNUM. For example, $MYMASK value for the first copy of a rate run will be 0x00000001, for the second copy of the rate will be 0x00000002 etc. Thus, the first copy of the rate run will have a CPU affinity of CPU0, the second copy will have the affinity CPU1 etc.
• $command: Program to be started, in this case, the benchmark instance to be started.

mysubmit.pl

This perl script is used to ensure that for a system with N cores the first N/2 benchmark copies are bound to a core that does not share its L2 cache with any of the other copies. The script does this by retrieving and using CPU data from /proc/cpuinfo. Note this script will only work for 6-core CPUs.

Source
******************************************************************************************************
#!/usr/bin/perl

use strict;
use Cwd;

# The order in which we want copies to be bound to cores
# Copies: 0, 1, 2, 3
# Cores: 0, 1, 3, 6

my $rundir = getcwd;

my $copynum = shift @ARGV;

my $i;
my $j;
my $tag;
my $num;
my $core;

my @proc;
my @cores;

open(INPUT, "/proc/cpuinfo") or
die "can't open /proc/cpuinfo\n";

#open(OUTPUT, "STDOUT");

# proc[i][0] = logical processor ID
# proc[i][1] = physical processor ID
# proc[i][2] = core ID

$i = 0;

while(<INPUT>)
{
chop;

($tag, $num) = split(/\s+:\s+/, $_);


if ($tag eq "processor") {
$proc[$i][0] = $num;
}

if ($tag eq "physical id") {
$proc[$i][1] = $num;
}

if ($tag eq "core id") {
$proc[$i][2] = $num;
$i++;
}
}

$i = 0;
$j = 0;

for $core (0, 4, 2, 1, 5, 3) {
while ($i < 24) {
if ($proc[$i][2] == $core) {
$cores[$j] = $proc[$i][0];
$j++;
}
$i++;
}
$i=0;
}

open RUNCOMMAND, "> runcommand" or die "failed to create run file";
print RUNCOMMAND "cd $rundir\n";
print RUNCOMMAND "@ARGV\n";
close RUNCOMMAND;
system 'taskset', '-c', $cores[$copynum], 'sh', "$rundir/runcommand";

ulimit -s [n | unlimited] (Linux)

Sets the stack size to n kbytes, or unlimited to allow the stack size to grow without limit.

KMP_STACKSIZE=integer[B|K|M|G|T] (Linux)

Sets the number of bytes to allocate for each parallel thread to use as its private stack. Use the optional suffix B, K, M, G, or T, to specify bytes, kilobytes, megabytes, gigabytes, or terabytes. The default setting is 2M on IA32 and 4M on IA64.

KMP_AFFINITY=physical,n (Linux)

Assigns threads to consecutive physical processors (for example, cores), beginning at processor n. Specifies the static mapping of user threads to physical cores, beginning at processor n. For example, if a system is configured with 8 cores, and OMP_NUM_THREADS=8 and KMP_AFFINITY=physical,2 are set, then thread 0 will mapped to core 2, thread 1 will be mapped to core 3, and so on in a round-robin fashion.

OMP_NUM_THREADS=n

This Environment Variable sets the maximum number of threads to use for OpenMP* parallel regions to n if no other value is specified in the application. This environment variable applies to both -openmp and -parallel (Linux) or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8 cores:
export OMP_NUM_THREADS=8
Default is the number of cores visible to the OS.

vm.max_map_count-n (Linux)

The maximum number of memory map areas a process may have. Memory map areas are used as a side-effect of calling malloc, directly by mmap and mprotect, and also when loading shared libraries.

Flag description origin markings:

	Indicates that the flag description came from the user flags file.
	Indicates that the flag description came from the suite-wide flags file.
	Indicates that the flag description came from a per-benchmark flags file.

For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.1.
Report generated on Tue Jul 22 20:54:38 2014 by SPEC CPU2006 flags formatter v6906.