Compilers |
Sun Studio 12
GCC for SPARC Systems V4.2.0 (gccfss).
Note: these compilers are described together because gccfss uses the same optimizing code generator as Studio 12. |
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Operating systems: | Solaris 10 |
Copyright: |
The text for many of the descriptions below was excerpted from the Sun Studio Compiler Documentation, which is copyright © 2005 Sun Microsystems, Inc. The original documentation can be found at docs.sun.com. Some material below is quoted from the gccfss website, http://cooltools.sunsource.net/gcc/. Additional information about GCC options may be found at the The GNU C documentation website. |
Last updated: 15-Feb-2008 jh |
Invoke the Sun Studio C Compiler.
Invoke the Sun Studio C++ Compiler
Invoke the Sun Studio Fortran 90 Compiler
Invoke the Sun Studio C Compiler.
Invoke the Sun Studio C++ Compiler
Invoke the Sun Studio Fortran 90 Compiler
A convenience option, this switch selects several other options that are described in this file.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Sun Studio C and Sun Studio C++ is 1. The default for Sun Studio Fortran and for gccfss is 2.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Enables the use of the fused multiply-add instruction.
Include a library containing chip-specific memory routines.
Use STLport's Standard Library implementation instead of the default libCstd.
A convenience option, this switch selects several other options that are described in this file.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Sun Studio C and Sun Studio C++ is 1. The default for Sun Studio Fortran and for gccfss is 2.
Allows the compiler to perform type-based alias analysis:
Enables the use of the fused multiply-add instruction.
Include a library containing chip-specific memory routines.
A convenience option, this switch selects the following switches that are described in this file:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Sun Studio C and Sun Studio C++ is 1. The default for Sun Studio Fortran and for gccfss is 2.
Enables the use of the fused multiply-add instruction.
Include a library containing chip-specific memory routines.
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects the following switches that are described in this file:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Sun Studio C and Sun Studio C++ is 1. The default for Sun Studio Fortran and for gccfss is 2.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Enables the use of the fused multiply-add instruction.
Include a library containing chip-specific memory routines.
A convenience option, this switch selects several other options that are described in this file.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Generate indirect prefetches for data arrays accessed indirectly.
Include a library containing chip-specific memory routines.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Sun Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Treat pointer-valued function parameters as restricted pointers.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Sun Studio C and Sun Studio C++ is 1. The default for Sun Studio Fortran and for gccfss is 2.
Specifies which instructions can be used. Among the choices are:
Enables the use of the fused multiply-add instruction.
Include a library containing chip-specific memory routines.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Sun Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Include a library containing chip-specific memory routines.
Use STLport's Standard Library implementation instead of the default libCstd.
A convenience option, this switch selects several other options that are described in this file.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Analyze loops for inter-iteration data dependencies, and do loop restructuring.
Allows the compiler to perform type-based alias analysis:
Include a library containing chip-specific memory routines.
Use STLport's Standard Library implementation instead of the default libCstd.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Sun Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Analyze loops for inter-iteration data dependencies, and do loop restructuring.
Allows the compiler to perform type-based alias analysis:
Treat pointer-valued function parameters as restricted pointers.
Include a library containing chip-specific memory routines.
Use STLport's Standard Library implementation instead of the default libCstd.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Sun Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Analyze loops for inter-iteration data dependencies, and do loop restructuring.
Allows the compiler to perform type-based alias analysis:
Controls simplifying assumptions for floating point arithmetic:
Treat pointer-valued function parameters as restricted pointers.
Allow generation of prefetch instructions. -xprefetch=yes and -xprefetch are synonyms for -xprefetch=auto,explicit. -xprefetch=no is a synonym for -xprefetch=no%auto,no%explicit. (Explicit prefetch macros are not used in the source code of the SPEC CPU2006 benchmarks; therefore, in the context of CPU2006, -xprefetch=yes is effectively a synonym for -xprefetch=auto.)
Include a library containing chip-specific memory routines.
Use STLport's Standard Library implementation instead of the default libCstd.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Sun Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Analyze loops for inter-iteration data dependencies, and do loop restructuring.
Allows the compiler to perform type-based alias analysis:
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Include a library containing chip-specific memory routines.
A convenience option, this switch selects the following switches that are described in this file:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Include a library containing chip-specific memory routines.
A convenience option, this switch selects the following switches that are described in this file:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Sun Studio C and Sun Studio C++ is 1. The default for Sun Studio Fortran and for gccfss is 2.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
This library provides faster versions of some common functions, such as malloc/free and bcopy.
Include a library containing chip-specific memory routines.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Sun Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects the following switches that are described in this file:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Turn off inlining.
Controls simplifying assumptions for floating point arithmetic:
Allow generation of prefetch instructions. -xprefetch=yes and -xprefetch are synonyms for -xprefetch=auto,explicit. -xprefetch=no is a synonym for -xprefetch=no%auto,no%explicit. (Explicit prefetch macros are not used in the source code of the SPEC CPU2006 benchmarks; therefore, in the context of CPU2006, -xprefetch=yes is effectively a synonym for -xprefetch=auto.)
Specifies which instructions can be used. Among the choices are:
xchip determines timing properties that are assumed by the compiler. It does not limit which instructions are allowed (see xtarget for that). Among the choices are:
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects the following switches that are described in this file:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Include a library containing chip-specific memory routines.
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects the following switches that are described in this file:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Allow the compiler to transform math library calls within loops into calls to the vector math library. Specifying -xvector is equivalent to -xvector=lib.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Sun Studio C and Sun Studio C++ is 1. The default for Sun Studio Fortran and for gccfss is 2.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Allows the compiler to perform type-based alias analysis at the specified alias level:
Include a library containing chip-specific memory routines.
Collect profile data for feedback-directed optimization. If an option directory is named, the feedback will be stored there.
When FDO is used, the training run gathers information regarding execution paths and data values. Hardware performance counters are not used. FDO improves existing optimizations but does not introduce new classes of optimization.
For gccfss, profile collection works the same as Sun Studio on SPARC.
Use data collected for profile feedback. If an option directory is named, look for the feedback data there.
A convenience option, this switch selects several other options that are described in this file.
A convenience option, this switch selects the following switches that are described in this file:
Perform optimizations across all object files in the link step:
At -xipo=2, the compiler performs inter-procedural aliasing analysis as well as optimization of memory allocation and layout to improve cache performance.
Set the preferred page size for running the program.
Enables the use of the fused multiply-add instruction.
Control the level of searching that the compiler does for prefetch opportunities by setting n to 1, 2, or 3, where higher numbers mean to do more searching. The default for Sun Studio C and Sun Studio C++ is 1. The default for Sun Studio Fortran and for gccfss is 2.
Adjust the compiler's assumptions about prefetch latency by the specified factor. Typically values in the range of 0.5 to 2.0 will be useful. A lower number might indicate that data will usually be cache resident; a higher number might indicate a relatively larger gap between the processor speed and the memory speed (compared to the assumptions built into the compiler).
Include a library containing chip-specific memory routines.
This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.
Allows the compiler to assume that your code does not rely on setting of the errno variable.
Sets the maximum assumed data alignment:
Selects faster (but nonstandard) handling of floating point arithmetic exceptions and gradual underflow.
Controls simplifying assumptions for floating point arithmetic:
Evaluate float expressions as single precision.
Turns off all IEEE 754 trapping modes.
Allows the compiler to perform type-based alias analysis at the specified alias level:
Substitute intrinsic functions or inline system functions where profitable for performance.
Analyze loops for inter-iteration data dependencies, and do loop restructuring.
Use inline expansion for math library, libm.
Select the optimized math library.
Specify optimization level n:
Selects options for architecture, chip timing, and cache sizes. These can also be controlled separately, via -xarch, -xchip, and -xcache, respectively. A wide variety of targets can be selected, including ultra3, ultra3cu, ultra3i, ultra3iplus, ultra4, ultra4plus, ultraT1, ultraT2, sparc64vi. In each case, appropriate options are selected for architecture, chip timing, and cache size to match that target.
If -xtarget=native is selected, options that are appropriate for the system where the compile is being done.
The default is -xtarget=generic, which sets the parameters for the best performance over most 32-bit platform architectures.
On Solaris SPARC systems, the default pointer size with -xtarget=native is 32-bit.
Specifies which instructions can be used. Among the choices are:
xcache defines the cache properties for use by the optimizer. It can specify use of default assumptions ("generic"); use of whatever the compiler can assume about the current platform ("native"); or an explicit description of up to three levels of cache, using colon-separated specifiers of the form si/li/ai, where:
xchip determines timing properties that are assumed by the compiler. It does not limit which instructions are allowed (see xtarget for that). Among the choices are:
Assume data is naturally aligned.
Sets the IEEE 754 trapping mode to common exceptions (invalid, division by zero, and overflow).
Pad local variables, for better use of cache.
Allow the compiler to transform math library calls within loops into calls to the vector math library. Specifying -xvector is equivalent to -xvector=lib.
Platform settings
One or more of the following settings may have been applied to the testbed. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.
autoup=<n> (Unix /etc/system)
When the file system flush daemon fsflush runs, it writes to disk all modified file buffers that are more
than n seconds old.
bufhwm=<n> (Unix /etc/system)
Sets the upper limit of the file system buffer cache. The units for bufhwm are in kilobytes.
cpu_bringup_set=<n> (Unix /etc/system)
Specifies which processors are enabled at boot time. <n> represents a bitmap of the
processors to be brought online.
disablecomponent (System Management Services)
This command can be used prior to booting the system for a 1-cpu test. The tester uses disablecomponent to
add all other CPUs to the "blacklist", which is a list of components that cannot be used at boot time.
LD_LIBRARY_PATH=<directories> (linker)
LD_LIBRARY_PATH controls the search order for both the compile-time and run-time linkers. Usually, it can be
defaulted; but testers may sometimes choose to explicitly set it (as documented in the notes in the submission), in order to
ensure that the correct versions of libraries are picked up.
LD_PRELOAD=<shared object> (Unix environment variable)
Adds the named shared object to the runtime environment.
MADV=access_lwp and LD_PRELOAD=madv.so.1 (Unix environment variables)
When the madv.so.1 shared object is present in the LD_PRELOAD list, it is possible to provide advice to the system
about how memory is likely to be accessed. The advice present in MADV applies to all processes and their descendants. A
commonly used value is access_lwp, which means that when memory is allocated, the next process to touch it will be
the primary user. Examples of other possible values include sequential, for memory that is used only once and
then no longer needed and acces_many when many processes will be sharing data.
MPSSHEAP=<size>, MPSSSTACK=<size>, and
LD_PRELOAD=mpss.so.1 (Unix environment variables)
When these variables are set, the mpss.so.1 shared object will set the preferred page size for new processes, and their
descendants, to the requested sizes for the heap and stack.
PARALLEL=<n> (Unix environment variable)
If programs have been compiled with -xautopar, this environment variable can be set to the number of
processors that programs should use.
segmap_percent=<n> (Unix /etc/system)
This value controls the size of the segmap cache as a percent of total memory. Set this value to help keep the file system cache from consuming memory unnecessarily.
STACKSIZE=<n> (Unix environment variable)
Set the size of the stack (temporary storage area) for each slave thread of a multithreaded program.
submit=echo 'pbind -b...' > dobmk; sh dobmk (SPEC tools, Unix shell)
When running multiple copies of benchmarks, the SPEC config file feature submit is sometimes used to
cause individual jobs to be bound to specific processors. If so, the specific command may be found in the config file; here
is a brief guide to understanding that command:
svcadm disable webconsole (Unix, superuser commands)
Turns off the Sun Web Console, a browser-based interface that performs systems management.
If it is enabled, system administrators can manage systems, devices and services from remote systems.
ts_dispatch_extended=<n> (Unix /etc/system)
Controls which dispatch table is loaded upon boot. A value of 1 loads the large system table, a value of 0 loads the regular system table.
tune_t_fsflushr=<n> (Unix /etc/system)
Controls the number of seconds between runs of the file system flush daemon, fsflush.
ulimit -s <n> (Unix shell)
Sets the stack size to n kbytes, or "unlimited" to allow the stack size to grow without limit.
Note that the "heap" and the "stack" share space; if your application allocates large amounts of memory on the heap,
then you may find that the stack limit should not be set to "unlimited". A commonly used setting for SPEC CPU2006 purposes
is a stack size of 128MB (131072K).
Flag description origin markings:
For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.1.
Report generated on Tue Jul 22 18:44:07 2014 by SPEC CPU2006 flags formatter v6906.