SPEC CPU2006 Platform Settings for Supermicro Systems

Firmware / BIOS / Microcode Settings

Hardware Prefetch:

This BIOS option allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern-recognition algorithm. In some cases, setting this option to Disabled may improve performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Adjacent Sector Prefetch:

This BIOS option allows the enabling/disabling of a processor mechanism to fetch the adjacent cache line within a 128-byte sector that contains the data needed due to a cache line miss. In some cases, setting this option to Disabled may improve performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Energy/Performance Bias:

This BIOS option allows for processor performance and power optmization. Available settings are:

• Performance: High performance with less need for power saving.
• Balanced Performance (Default Setting): Provides optimal performance efficiency.
• Balanced Energy: Provides optimal power efficiency.
• Energy Efficient: High power saving with less need for performance.

DRAM RAPL:

RAPL (Running Average Power Limit) provides mechanisms to enforce power consumption limits on supported processors.

Double Refresh:

• Disable: Force memory refresh rate to x1, i.e. 7.8us.
• Auto: 7.8us refresh rate for normal temperature and 3.9us refresh rate when memory overheats.
• Enable: Force memory refresh rate to x2, i.e. 3.9us for high density DIMM. It can make the system more stable, but will increase power and can affect performance.
• Energy Efficient: High power saving with less need for performance.

C1E:

Enhanced C1 Power State boosts system performance.

CPU C3 Report:

Allows the BIOS to report the CPU C3 State (ACPI C2) to the operating system. During the CPU C3 State, the CPU clock generator is turned off.

CPU C6 Report:

Allows the BIOS to report the CPU C6 State (ACPI C3) to the operating system. During the CPU C6 State, the power to all cache is turned off.

C-state Limit:

Allows user to set the limit on the C-State package register

Hyper-Threading (ALL):

Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper-Threading Technology). When Disabled only one thread per enabled core is enabled.

Double Refresh:

Description

Force SPD:

Forces the memory to run the frequency value selected despite DIMM per channel configuration. Normally (set as Auto), more DIMM per channel results in memory running at lower speeds.

Demand Scrub:

Demand Scrubbing is a process that allows the CPU to correct correctable memory errors found on a memory module. When the CPU or I/O issues a demand-read command, and the read data from memory turns out to be a correctable error, the error is corrected and sent to the requestor (the original source). Memory is updated as well. Select Enabled to use Demand Scrubbing for ECC memory correction.

Profile: (Profiles may override manually chosen BIOS settings)

• Default: Manually change BIOS settings in other menus
• Profile #1: Performance Compute: Set this system configuration profile to achieve maximum performance for compute intensive applications.
• Profile #2: Balanced Compute: Set this system configuration profile to achieve balanced performance across CPU cores.
• Profile #3: Memory bandwidth: Set this system configuration profile to achieve maximum memory bandwidth for applications requiring large and frequent data access.

COD Enable:

Cluster on Die (COD) mode logically splits a socket into 2 NUMA domains that are exposed to the OS with half the amount of cores and LLC assigned to each NUMA domain in a socket. This mode utilizes an on-die directory cache and in memory directory bits to determine whether a snoop needs to be sent. Use this mode for highly NUMA optimized workloads to get the lowest local memory latency and highest local memory bandwidth for NUMA workloads.

Early Snoop:

Early Snoop mode for workloads that are memory latency sensitive or for workloads that benefit from fast cache-to-cache transfer latencies from the remote socket. Snoops are sent out earlier, which is why memory latency is lower in this mode.

Enforce POR:

Enable to enforce Plan Of Record restrictions for DDR4 frequency and voltage programming. Memory speeds will be capped at Intel guidelines.

Memory Frequency:

Selects desired memory frequecy (within populated memory limits).