SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
Fujitsu Siemens Computers
PRIMERGY TX300 S3, Intel Xeon processor E5310, 1.60 GHz
SPECint_rate2000 = 68.8  
SPECint_rate_base2000 = 68.8  
SPEC license # 22 Tested by: Fujitsu Siemens Computers Test date: Oct-2006 Hardware Avail: Nov-2006 Software Avail: May-2006
Graph Scale Benchmark Base
Copies		 Base
Runtime		 Base
Ratio		 Copies Runtime Ratio
164.gzip base result bar (44.7)
164.gzip peak result bar (44.7)		 164.gzip 4 145    44.7   4 145    44.7  
175.vpr base result bar (51.0)
175.vpr peak result bar (51.0)		 175.vpr 4 127    51.0   4 127    51.0  
176.gcc base result bar (78.3)
176.gcc peak result bar (78.3)		 176.gcc 4 65.2  78.3   4 65.2  78.3  
181.mcf base result bar (63.7)
181.mcf peak result bar (63.7)		 181.mcf 4 131    63.7   4 131    63.7  
186.crafty base result bar (67.7)
186.crafty peak result bar (67.7)		 186.crafty 4 68.6  67.7   4 68.6  67.7  
197.parser base result bar (56.4)
197.parser peak result bar (56.4)		 197.parser 4 148    56.4   4 148    56.4  
252.eon base result bar (95.7)
252.eon peak result bar (95.7)		 252.eon 4 63.0  95.7   4 63.0  95.7  
253.perlbmk base result bar (86.5)
253.perlbmk peak result bar (86.5)		 253.perlbmk 4 96.5  86.5   4 96.5  86.5  
254.gap base result bar (62.5)
254.gap peak result bar (62.5)		 254.gap 4 81.7  62.5   4 81.7  62.5  
255.vortex base result bar (117)
255.vortex peak result bar (117)		 255.vortex 4 75.4  117     4 75.4  117    
256.bzip2 base result bar (50.7)
256.bzip2 peak result bar (50.7)		 256.bzip2 4 137    50.7   4 137    50.7  
300.twolf base result bar (84.7)
300.twolf peak result bar (84.7)		 300.twolf 4 164    84.7   4 164    84.7  
  SPECint_rate_base2000 68.8    
  SPECint_rate2000 68.8  

Hardware
Hardware Vendor: Fujitsu Siemens Computers
Model Name: PRIMERGY TX300 S3, Intel Xeon processor E5310, 1.60 GHz
CPU: Intel Xeon processor E5310 (1.60 GHz, 2x4MB L2, 1066 MHz system bus)
CPU MHz: 1600
FPU: Integrated
CPU(s) enabled: 4 cores, 1 chip, 4 cores/chip
CPU(s) orderable: 1,2 chips
Parallel: No
Primary Cache: 32KB(I) + 32KB(D) on chip, per core
Secondary Cache: 8MB(I+D) on chip, per chip (4MB shared per 2 cores)
L3 Cache: N/A
Other Cache: N/A
Memory: 8x1GB DDR2-RAM PC2-4200F (CAS 4-4-4)
Disk Subsystem: Seagate ST373454SS (SAS, 15.4krpm, 73GB)
Other Hardware: none
Software
Operating System: Windows Server 2003 Enterprise Edition + SP1 (32-bit)
Compiler: Intel C++ Compiler 9.1
Build 20060323Z (for 32-bit applications),
Microsoft Visual Studio .Net 2003
7.1.3088 (for libraries),
SmartHeap Library Version 8.0
from http://www.microquill.com
File System: NTFS
System State: Default
Notes / Tuning Information 
 GENERAL
 +FDO: PASS1=-Qprof_gen  PASS2=-Qprof_use
 
 Portability flags 
    176.gcc:     -Dalloca=_alloca /F10000000
    186.crafty:  -DNT_i386
    253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
    254.gap:     -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO

 Base tuning flags
    for C programs:   -fast +FDO shlW32M.lib
    for C++ programs: -fast -Qcxx_features +FDO shlW32M.lib
 
 Peak tuning flags
    same as baseline (basepeak=true set globally)
 
 The system bus runs at 1066 MHz
 
 This result was measured with 32-bit binaries using the 32-bit version of
 the operating system.

 BIOS configuration:
 Adjacent Sector Prefetch = disable
 This result was measured on the PRIMERGY RX300 S3. The PRIMERGY TX300 S3 and
 the PRIMERGY RX300 S3 are electronically equivalent.
 
 For information about Fujitsu Siemens Computers in your country please see:
 http://www.fujitsu-siemens.com/countries

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 15-Nov-2006

Generated on Wed Nov 15 13:08:20 2006 by SPEC CPU2000 HTML formatter v1.01