SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer xSeries HS20 (2.0 GHz Xeon LV, 2MB L2 Shared Cache)
SPECint2000 = 1668     
SPECint_base2000 = 1663     
SPEC license # 11 Tested by: IBM Corporation Test date: Mar-2006 Hardware Avail: Mar-2006 Software Avail: Dec-2005
Benchmark Reference
Time		 Base
Runtime		 Base
Ratio		 Runtime Ratio Graph Scale
164.gzip 1400 122    1147      122    1144      164.gzip base result bar (1147)
164.gzip peak result bar (1144)
175.vpr 1400 108    1298      104    1343      175.vpr base result bar (1298)
175.vpr peak result bar (1343)
176.gcc 1100 58.1  1892      58.1  1892      176.gcc base result bar (1892)
176.gcc peak result bar (1892)
181.mcf 1800 99.1  1817      99.0  1818      181.mcf base result bar (1817)
181.mcf peak result bar (1818)
186.crafty 1000 65.0  1537      65.4  1530      186.crafty base result bar (1537)
186.crafty peak result bar (1530)
197.parser 1800 130    1387      129    1391      197.parser base result bar (1387)
197.parser peak result bar (1391)
252.eon 1300 63.9  2036      63.9  2033      252.eon base result bar (2036)
252.eon peak result bar (2033)
253.perlbmk 1800 97.1  1853      96.6  1864      253.perlbmk base result bar (1853)
253.perlbmk peak result bar (1864)
254.gap 1100 66.3  1660      66.6  1653      254.gap base result bar (1660)
254.gap peak result bar (1653)
255.vortex 1900 73.4  2589      73.3  2591      255.vortex base result bar (2589)
255.vortex peak result bar (2591)
256.bzip2 1500 122    1228      122    1228      256.bzip2 base result bar (1228)
256.bzip2 peak result bar (1228)
300.twolf 3000 146    2055      145    2068      300.twolf base result bar (2055)
300.twolf peak result bar (2068)
SPECint_base2000 1663       
  SPECint2000 1668       

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM eServer xSeries HS20 (2.0 GHz Xeon LV, 2MB L2 Shared Cache)
CPU: Dual-Core Intel Processor Xeon LV .0GHz (667 MHz system bus)
CPU MHz: 2000
FPU: Integrated
CPU(s) enabled: 4 cores, 2 chips, 2 cores/chip
CPU(s) orderable: 1,2
Parallel: No
Primary Cache: 12K(I) micro-ops + 16KB(D) (on chip) per core
Secondary Cache: 2048KB(I+D) (on chip) shared by 2 cores
L3 Cache: N/A
Other Cache: N/A
Memory: 4 x 2048 MB ECC PC2-3200 Single Rank
Disk Subsystem: 73GB SCSI 10K RPM
Other Hardware:
Software
Operating System: Windows Server 2003 Standard Edition
Compiler: Intel C/C++ Compiler 9.0 (20051130Z) for 32-bit applications
Intel Fortran Compiler 9.0 (20051120Z) for 32-bit applications
Microsoft Visual Studio .NET 13.0.9466 (for libraries)
MicroQuill Smartheap Library 7.30
File System: NTFS
System State: Default
Notes / Tuning Information 
 GENERAL
   ONESTEP=yes
   +FDO:   PASS1=-Qprof_gen  PASS2=-Qprof_use
 PORTABILITY FLAGS
   176.gcc:     -Dalloca=_alloca /F10000000
   186.crafty:  -DNT_i386
   253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
   254.gap:     -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 BASE TUNING
   C:           -fast -Qansi_alias +FDO shlW32M.lib
   C++:         -fast -Qcxx_features +FDO shlW32M.lib
 PEAK TUNING
   164.gzip:    -fast +FDO
   175.vpr:     -fast +FDO
   176.gcc:     basepeak=yes
   181.mcf:     -fast +FDO shlW32M.lib
   186.crafty:  -fast -Oa +FDO shlW32M.lib
   197.parser:  -fast +FDO 
   252.eon:     -fast +FDO shlW32M.lib
   253.perlbmk: -fast -Oa +FDO shlW32M.lib
   254.gap:     -fast +FDO
   255.vortex   -fast +FDO shlw32M.lib
   256.bzip2:   -fast -Qunroll1 -Oa +FDO shlw32M.lib
   300.twolf:   -fast +FDO shlW32M.lib
 EXTRA LIBRARIES
   shlW32M.lib: MicroQuill SmartHeap Library 7.3
                www.microquill.com

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Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 04-Apr-2006

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