SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
IBM Corporation
IBM System p5 575 (2200 MHz, 8 CPU)
SPECint_rate2000 = 200    
SPECint_rate_base2000 = 196    
SPEC license # 11 Tested by: IBM Test date: Dec-2005 Hardware Avail: Feb-2006 Software Avail: Feb-2006
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
164.gzip base result bar (126)
164.gzip peak result bar (130)
164.gzip 16 206    126     16 200    130    
175.vpr base result bar (177)
175.vpr peak result bar (180)
175.vpr 16 147    177     16 145    180    
176.gcc base result bar (200)
176.gcc peak result bar (201)
176.gcc 16 102    200     16 102    201    
181.mcf base result bar (387)
181.mcf peak result bar (312)
181.mcf 16 86.4  387     16 107    312    
186.crafty base result bar (147)
186.crafty peak result bar (181)
186.crafty 16 126    147     16 103    181    
197.parser base result bar (184)
197.parser peak result bar (181)
197.parser 16 182    184     16 185    181    
252.eon base result bar (218)
252.eon peak result bar (218)
252.eon 16 111    218     16 111    218    
253.perlbmk base result bar (138)
253.perlbmk peak result bar (154)
253.perlbmk 16 243    138     16 217    154    
254.gap base result bar (182)
254.gap peak result bar (183)
254.gap 16 112    182     16 111    183    
255.vortex base result bar (307)
255.vortex peak result bar (321)
255.vortex 16 115    307     16 110    321    
256.bzip2 base result bar (208)
256.bzip2 peak result bar (217)
256.bzip2 16 134    208     16 129    217    
300.twolf base result bar (200)
300.twolf peak result bar (196)
300.twolf 16 278    200     16 284    196    
  SPECint_rate_base2000 196      
  SPECint_rate2000 200    

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM System p5 575 (2200 MHz, 8 CPU)
CPU: POWER5+
CPU MHz: 2200
FPU: Integrated
CPU(s) enabled: 8 cores, 8 chips, 1 core/chip (SMT on)
CPU(s) orderable: 8,16
Parallel: No
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified, shared (on chip)/chip
L3 Cache: 36MB unified (off-chip)/DCM, 8 DCMs/SUT
Other Cache: None
Memory: 64x512MB
Disk Subsystem: 2x73GB SCSI, 15K RPM
Other Hardware: None
Software
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition Version 8.0 for AIX
File System: AIX/JFS2
System State: Multi-user
Notes / Tuning Information
  Portability Flags:
    176.gcc:      -ma -DHOST_WORDS_BIG_ENDIAN
    186.crafty:   -DAIX
    253.perlbmk:  -DSPEC_CPU2000_AIX
    254.gap:      -DSYS_IS_BSD -DSYS_STRING_H
                  -DSYS_HAS_MALLOC_PROTO -DSYS_HAS_CALLOC_PROTO
    300.twolf:    -DHAVE_SIGNED_CHAR
 
  Base Optimization Flags:
    C:    -qpdf1/pdf2
          -O5 -blpdata -D_ILS_MACROS
    C++:  -qpdf1/pdf2
          -O4 -qalign=natural
 
  Peak Optimization Flags
    164.gzip:     -qpdf1/pdf2
                  -O4 -qfdpr -blpdata
                  fdpr -q -O3
    175.vpr:      -qpdf1/pdf2
                  -O5 -qfdpr -blpdata
                  fdpr -q -O3
    176.gcc:      -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata
    181.mcf:      -qpdf1/pdf2
                  -O4 -qalign=natural -blpdata
    186.crafty:   -qpdf1/pdf2
                  -O4 -qalign=natural -q64 -lhmu -blpdata
    197.parser:   -qpdf1/pdf2
                  -O4 -qfdpr -D_ILS_MACROS -blpdata
                  fdpr -q -O3
    252.eon:      -qpdf1/pdf2
                  -O4 -qalign=natural
    253.perlbmk:  -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata -lhmu
    254.gap:      -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata
    255.vortex:   -qpdf1/pdf2
                  -O4 -qfdpr -lhmu -blpdata
                  fdpr -q -O3
    256.bzip2:    -qpdf1/pdf2
                  -O5 -qfdpr -blpdata
                  fdpr -q -O3
    300.twolf:    -O5 -qfdpr -blpdata
                  fdpr -q -O3
 
 
  The installed OS level is AIX 5L for POWER version 5.3 with the 5300-04 Recommended Technology Level.
 
  SMT:  Acronym for "Simultaneous Multi-Threading". A processor technology that allows
        the simultaneous execution of multiple thread contexts within a single processor
        core. (Enabled by default)
  DCM:  Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
  SUT:  Acronym for "System Under Test"
 
  Extended C:     IBM XL C for AIX invoked as cc
  C++:            IBM XL C for AIX invoked as xlC
 
  ulimits set to unlimited.
  Large page mode and memory affinity were set as follows:
      vmo -r -o lgpg_regions=1600 -o lgpg_size=16777216
      chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
      shutdown -rF
      export MEMORY_AFFINITY=MCM
 
  The following config-file entry was used to assign each benchmark process to a core:
       submit = bindprocessor \$\$ \$SPECUSERNUM; $command
  The "bindprocessor" AIX command binds a process to a CPU core.
 


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Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 08-Mar-2006

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