SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
IBM Corporation
IBM System p5 575 (1900 MHz, 16 CPU)
SPECint_rate2000 = 314    
SPECint_rate_base2000 = 310    
SPEC license # 11 Tested by: IBM Test date: Dec-2005 Hardware Avail: Feb-2006 Software Avail: Feb-2006
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
164.gzip base result bar (214)
164.gzip peak result bar (213)
164.gzip 32 242    214     32 243    213    
175.vpr base result bar (266)
175.vpr peak result bar (269)
175.vpr 32 195    266     32 193    269    
176.gcc base result bar (337)
176.gcc peak result bar (337)
176.gcc 32 121    337     32 121    337    
181.mcf base result bar (449)
181.mcf peak result bar (383)
181.mcf 32 149    449     32 174    383    
186.crafty base result bar (239)
186.crafty peak result bar (290)
186.crafty 32 156    239     32 128    290    
197.parser base result bar (300)
197.parser peak result bar (295)
197.parser 32 223    300     32 227    295    
252.eon base result bar (366)
252.eon peak result bar (367)
252.eon 32 132    366     32 132    367    
253.perlbmk base result bar (224)
253.perlbmk peak result bar (235)
253.perlbmk 32 298    224     32 284    235    
254.gap base result bar (309)
254.gap peak result bar (310)
254.gap 32 132    309     32 132    310    
255.vortex base result bar (506)
255.vortex peak result bar (529)
255.vortex 32 139    506     32 133    529    
256.bzip2 base result bar (338)
256.bzip2 peak result bar (349)
256.bzip2 32 165    338     32 160    349    
300.twolf base result bar (292)
300.twolf peak result bar (290)
300.twolf 32 381    292     32 384    290    
  SPECint_rate_base2000 310      
  SPECint_rate2000 314    

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM System p5 575 (1900 MHz, 16 CPU)
CPU: POWER5+
CPU MHz: 1900
FPU: Integrated
CPU(s) enabled: 16 cores, 8 chips, 2 cores/chip (SMT on)
CPU(s) orderable: 8,16
Parallel: No
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified, shared (on chip)/chip
L3 Cache: 36MB unified (off-chip)/DCM, 8 DCMs/SUT
Other Cache: None
Memory: 64x2GB
Disk Subsystem: 2x73GB SCSI, 15K RPM
Other Hardware: None
Software
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition Version 8.0 for AIX
File System: AIX/JFS2
System State: Multi-user
Notes / Tuning Information
  Portability Flags:
    176.gcc:      -ma -DHOST_WORDS_BIG_ENDIAN
    186.crafty:   -DAIX
    253.perlbmk:  -DSPEC_CPU2000_AIX
    254.gap:      -DSYS_IS_BSD -DSYS_STRING_H
                  -DSYS_HAS_MALLOC_PROTO -DSYS_HAS_CALLOC_PROTO
    300.twolf:    -DHAVE_SIGNED_CHAR
 
  Base Optimization Flags:
    C:    -qpdf1/pdf2
          -O5 -blpdata -D_ILS_MACROS
    C++:  -qpdf1/pdf2
          -O4 -qalign=natural
 
  Peak Optimization Flags
    164.gzip:     -qpdf1/pdf2
                  -O4 -qfdpr -blpdata
                  fdpr -q -O3
    175.vpr:      -qpdf1/pdf2
                  -O5 -qfdpr -blpdata
                  fdpr -q -O3
    176.gcc:      -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata
    181.mcf:      -qpdf1/pdf2
                  -O4 -qalign=natural -blpdata
    186.crafty:   -qpdf1/pdf2
                  -O4 -qalign=natural -q64 -lhmu -blpdata
    197.parser:   -qpdf1/pdf2
                  -O4 -qfdpr -D_ILS_MACROS -blpdata
                  fdpr -q -O3
    252.eon:      -qpdf1/pdf2
                  -O4 -qalign=natural
    253.perlbmk:  -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata -lhmu
    254.gap:      -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata
    255.vortex:   -qpdf1/pdf2
                  -O4 -qfdpr -lhmu -blpdata
                  fdpr -q -O3
    256.bzip2:    -qpdf1/pdf2
                  -O5 -qfdpr -blpdata
                  fdpr -q -O3
    300.twolf:    -O5 -qfdpr -blpdata
                  fdpr -q -O3
 
 
  The installed OS level is AIX 5L for POWER version 5.3 with the 5300-04 Recommended Technology Level.
 
  SMT:  Acronym for "Simultaneous Multi-Threading". A processor technology that allows
        the simultaneous execution of multiple thread contexts within a single processor
        core. (Enabled by default)
  DCM:  Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
  SUT:  Acronym for "System Under Test"
 
  Extended C:     IBM XL C for AIX invoked as cc
  C++:            IBM XL C for AIX invoked as xlC
 
  ulimits set to unlimited.
  Large page mode and memory affinity were set as follows:
      vmo -r -o lgpg_regions=3200 -o lgpg_size=16777216
      chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
      shutdown -rF
      export MEMORY_AFFINITY=MCM
 
  The following config-file entry was used to assign each benchmark process to a core:
       submit = bindprocessor \$\$ \$SPECUSERNUM; $command
  The "bindprocessor" AIX command binds a process to a CPU core.
 


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Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 08-Mar-2006

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