SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer p5 550 (1650 MHz, 4 CPU)
SPECint_rate2000 = 65.5  
SPECint_rate_base2000 = 60.4  
SPEC license # 11 Tested by: IBM Test date: Jun-2004 Hardware Avail: Aug-2004 Software Avail: Aug-2004
Graph Scale Benchmark Base
Copies		 Base
Runtime		 Base
Ratio		 Copies Runtime Ratio
164.gzip base result bar (47.4)
164.gzip peak result bar (47.6)		 164.gzip 8 274    47.4   8 273    47.6  
175.vpr base result bar (53.6)
175.vpr peak result bar (53.6)		 175.vpr 8 243    53.6   8 243    53.6  
176.gcc base result bar (70.6)
176.gcc peak result bar (70.6)		 176.gcc 8 145    70.6   8 145    70.6  
181.mcf base result bar (80.9)
181.mcf peak result bar (80.7)		 181.mcf 8 206    80.9   8 207    80.7  
186.crafty base result bar (47.9)
186.crafty peak result bar (65.9)		 186.crafty 8 194    47.9   8 141    65.9  
197.parser base result bar (37.6)
197.parser peak result bar (58.1)		 197.parser 8 444    37.6   8 288    58.1  
252.eon base result bar (76.7)
252.eon peak result bar (76.7)		 252.eon 8 157    76.7   8 157    76.7  
253.perlbmk base result bar (48.9)
253.perlbmk peak result bar (54.0)		 253.perlbmk 8 342    48.9   8 309    54.0  
254.gap base result bar (54.5)
254.gap peak result bar (58.3)		 254.gap 8 187    54.5   8 175    58.3  
255.vortex base result bar (101)
255.vortex peak result bar (106)		 255.vortex 8 175    101     8 166    106    
256.bzip2 base result bar (69.3)
256.bzip2 peak result bar (70.2)		 256.bzip2 8 201    69.3   8 198    70.2  
300.twolf base result bar (63.4)
300.twolf peak result bar (62.0)		 300.twolf 8 439    63.4   8 449    62.0  
  SPECint_rate_base2000 60.4    
  SPECint_rate2000 65.5  

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM eServer p5 550 (1650 MHz, 4 CPU)
CPU: POWER5
CPU MHz: 1650
FPU: Integrated
CPU(s) enabled: 4 cores, 2 chips, 2 cores/chip (SMT on)
CPU(s) orderable: 2,4
Parallel: No
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified (on chip)/chip
L3 Cache: 36MB unified (off chip)/DCM, 2 DCM/SUT
Other Cache: none
Memory: 16x4 GB
Disk Subsystem: 1x36GB SCSI, 15K RPM
Other Hardware:
Software
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition Version 7.0 for AIX
File System: AIX/JFS2
System State: Multi-User
Notes / Tuning Information 
 Portability Flags:
   176.gcc:      -ma -DHOST_WORDS_BIG_ENDIAN
   186.crafty:   -DAIX
   252.eon:      srcalt=fmax_errno 
                 -I. -DNDEBUG
   253.perlbmk:  -DSPEC_CPU2000_AIX
   254.gap:      -DSYS_IS_BSD -DSYS_STRING_H -DSYS_HAS_TIME_PROTO
                 -DSYS_HAS_MALLOC_PROTO -DSYS_HAS_CALLOC_PROTO
   300.twolf:    -DHAVE_SIGNED_CHAR
 
 
 Base Optimization Flags:
   C:    -qpdf1/pdf2 
         -O5 -blpdata -qalign=natural
   C++:  -qpdf1/pdf2 
         -O5 -lhmu -qalign=natural
 
 
 Peak Optimization Flags
   164.gzip:     -qpdf1/pdf2
                 -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -D_ILS_MACROS
                 "CC=xlc"
   175.vpr:      basepeak = 1 
   176.gcc:      basepeak = 1
   181.mcf:      fdpr -quiet -R3
                 -O5 -blpdata -qfdpr
   186.crafty:   -qpdf1/pdf2
                 fdpr -quiet -R3
                 -O4 -q64 -qfdpr -qarch=pwr3 -qtune=pwr3 -D_ILS_MACROS
   197.parser:   -qpdf1/pdf2
                 fdpr -quiet -R3
                 -O4 -blpdata -D_ILS_MACROS -qfdpr -qarch=pwr3 -qtune=pwr3
   252.eon:      basepeak = 1
   253.perlbmk:  -qpdf1/pdf2
                 -O5 -D_ILS_MACROS -lhmu -qalign=natural
   254.gap:      -qpdf1/pdf2
                 -O4 -qarch=pwr4 -qtune=pwr4 -D_ILS_MACROS -lhmu -qalign=natural
   255.vortex:   -qpdf1/pdf2
                 -O5 -lhmu -qalign=natural -D_ILS_MACROS -blpdata
   256.bzip2:    -qpdf1/pdf2
                 -O5 -blpdata -qarch=pwr3 -qtune=pwr3 -qalign=natural
   300.twolf:    -O5 -lhmu -blpdata -qalign=natural
                 "CC = xlc"

 SMT: Acronym for "Simultaneous Multi-Threading". A processor technology that allows
      the simultaneous execution of multiple thread contexts within a single processor
      core. (Enabled by default)
 Approved alternate-source file 252.eon.fmax_errno.src.alt.tar.gz
 was used with 252.eon for POSIX-compatibility.

 DCM: Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
 SUT: Acronym for "System Under Test"

 ulimits set to unlimited.
 Large page mode and memory affinity were set as follows:
    vmo -r -o lgpg_regions=400 -o lgpg_size=16777216 -o memory_affinity=1
    chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
    reboot -q
    export MEMORY_AFFINITY=MCM

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 24-Aug-2004

Generated on Tue Aug 24 18:29:37 2004 by SPEC CPU2000 HTML formatter v1.01